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HP0-255 Exam

Planning & Design of HP Integrity Mid-Range Server Solutions

  • Exam Number/Code : HP0-255
  • Exam Name : Planning & Design of HP Integrity Mid-Range Server Solutions
  • Questions and Answers : 138 Q&As
  • Update Time: 2011-09-21
  • Price: $ 119.00 $ 69.00

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HP Certification I HP0-255 exam braindumps questions and answers

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Exam : HP HP0-255
Title : Planning & Design of HP Integrity Mid-Range Server Solutions


1. Which component of the sx1000 chipset provides the connection to the CPUs?
A. PDH Riser Board
B. Cell Controller (CC)
C. Front-Side Controller (FSC)
D. System Bus Adapter (SBA)
Answer: B

2. The rx8620 Itanium server includes which high-availability features? Select TWO.
A. three independent Ultra SCSI buses to internal disks
B. online CPU replacement
C. Dynamic Processor resilience and deallocation
D. N+3 power inputs
E. online addition and replacement of PCI I/O cards
Answer: CE

3. Adaptive Enterprise capabilities are made possible by which Integrity server feature?
A. scalability via mx2 modules
B. investment protection for TRU64 UNIX customers
C. re-use of hardware across multiple operating systems
D. component interchange capability with HP ProLiant servers
Answer: C

4. Your customer has an rx8620 server with an HP Smart Array 6402 Controller and two disks connected. Which RAID type can you configure to ensure fault tolerance?
A. RAID 0
B. RAID 1
C. RAID 1+0
D. RAID 5
Answer: B

5. The Performance Quick Reference Tool (PQRT) can be used to analyze systems using which criteria? Select TWO.
A. ISV portfolio
B. specific system
C. feature positioning
D. I/O characteristics
E. performance range
Answer: BE

6. What information is available from the HP Product Bulletin? Select THREE.
A. product overview
B. support information
C. performance information
D. configuration information
E. technical setup instruction
F. pricing information
Answer: ADF

7. The recommended minimum memory configuration for an rx7620 server cell board is loading eight DIMMs. What is the reason?
A. It provides direct memory access to all four frontside buses.
B. For best performance all four memory data paths should be used.
C. It provides direct memory access to both frontside buses.
D. For best performance all eight memory data paths should be used.
Answer: B

8. Which upgrade is possible with cell boards containing an sx1000 chipset?
A. PCI to PCI-X 2.0 I/O
B. PCI-X to PCI-X 2.0 I/O
C. SDR to DDR2 memory DIMMs
D. Itanium 2 to mx2 CPU modules
Answer: D

9. Your customer needs to upgrade and migrate his On-Line Transaction Processing (OLTP) database from a Solaris SPARC platform. He is considering the HP Integrity server line to consolidate the data center environment. Which resource would you use to match and size the OLTP environment to an HP Integrity server platform running HP-UX11i v2?
A. Performance Quick Reference Card (PQRC)
B. Performance Quick Reference Tool (PQRT)
C. Microsoft SQL Server Sizing Tool for Integrity (ActiveAnswers Tools)
D. Enterprise Configurator (eCo)
Answer: B

10. Which cell board architecture supports Itanium 2 processors, PA-RISC dual-core processors and the Itanium dual-processor modules?
A. E8870 chipset
B. EXA chipset
C. sx1000 chipset
D. zx1 chipset
Answer: C

11. You want to configure an rx8620 server. What is the minimum CPU configuration for a cell board? Select TWO.
A. one single-core CPU module
B. two single-core CPU modules
C. two dual-core CPU modules
D. four single-core CPU modules
E. one dual-core CPU module
Answer: BE

12. Your customer wants to run Microsoft Cluster Services with Microsoft Windows Server 2003 Datacenter Edition. What is the smallest Itanium server that supports this configuration?
A. rx8620
B. rx7620
C. rx4640
D. rx8620 with a Server Expansion Unit (SEU)
Answer: B

13. Which HP Itanium servers can support running Windows, Linux, and HP-UX simultaneously?
A. rx8620 and rx7620
B. rx5670 and rx7620
C. rx4640 and rx8620
D. rx8620 and Integrity Superdome
Answer: D

14. What is the function of the cell board in HP Integrity mid-range servers?
A. provides PCI bus technology for I/O
B. enables "chip-kill" like redundancy of cache
C. replaces the test station or maintenance console
D. provides connections to crossbar, CPU, memory, and I/O components
Answer: D


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